 
 
      Starting the software
      
|   Design Wizard Window |   Create an empty design | 
 
 
      Design Browser Window
      
 
 
      Edit VHDL source code
      
 
 
      Syntax Checking Successful
      
 
 
      Manual Simulation Window
      
You can perform either a single step simulation, which is useful for source code debugging, or a continues simulation. Finish simulation by selecting the End Simulation option in the Simulatior menu. Save your waveform before exit.
 
 
      Manual Simulation Result
 
 
      Test Bench Simulation
That's it. Practice this convenient software, you should discover many more nice features by yourself.